This workshop focuses on how to model state-of-the-art parallel computers, and will also examine the possible impact of new architectures (such as the KSR, CM-5, and others) and technologies (such as optics) on our models.
This workshop covers the whole spectrum of parallel algorithms.
This workshop covers topics including memory management in parallel computers, hierarchical memory systems, cache coherence, I/O, and algorithms for routing and sorting in parallel machines.